phd in vlsi physical design

Biography and CV

Recent news.

• More archival news at UTDA .

My Research Group: UT Design Automation Laboratory

• Publications
• My Citations (from Google Scholar)
• EE460R: Introduction to VLSI Design (Fall 2024, 2023, 2022, 2021, 2014; Spring 2014, 2013)
• EE382M-7: VLSI I (Fall 2024, 2023, 2022, 2021, 2014, 2012; Spring 2010, 2009, 2008, 2007)
• EE382M-26 (was EE382V): VLSI CAD and Optimization (Spring 2025, 2023; Fall 2020, 2018, 2016, 2013, 2011, 2009, 2007; Spring 2006, 2005, 2004)
• EE382M-22 (was EE382V): VLSI Physical Design Automation (Spring 2024, 2022, 2020; Fall 2017; Spring 2015, 2011; Fall 2008, 2006, 2005, 2004)
• EE316: Digital Logic Design (Spring 2021, 2020, 2019, 2018, 2017)
• EE360S: Digital Integrated Circuits (Spring 2012, 2009)
• EE360R: Computer-aided IC Design (Fall 2010, Spring 2010, 2008, 2007)
• EE322C: Data Structures (Spring 2006, Fall 2003)
• Senior Associate Editor, ACM Transactions on Design Automation of Electronic Systems (TODAES), 2014-present
• Associate Editor, IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems (TCAD), 2006-2011; 2018-present
• Associate Editor, IEEE Design & Test , 2016-present
• Associate Editor, Science China Information Sciences , 2013-present
• Subject Area Editor (in Architecture and VLSI Design), Journal of Computer Science and Technology (JCST), 2010-present
• Associate Editor, IET Computers & Digital Techniques , 2014-present
• Associate Editor, IEEE Circuits and Systems Society (CASS) Newsletter , 2007-2016
• Associate Editor, IEEE Transactions on Very Large Scale Integration Systems (TVLSI), 2007-2014
• Associate Editor, IEEE Transactions on Circuits and Systems I: Regular Papers (TCAS-I), 2008-2009
• Associate Editor, IEEE Transactions on Circuits and Systems II: Express Briefs (TCAS-II), 2006-2007
• Guest Editor, IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems (TCAD) for ISPD Special Section, 2007 and 2008

Professional Services (Selected)

• External Advisory Board, NSF A3D3 Institute: Accelerated Artificial Intelligence Algorithms for Data-Driven Discovery ,   2023
• Executive Committee (Program Co-Chair), ACM/IEEE Design Automation Conference) ,   2023
• Executive Committee (Panel Chair), ACM/IEEE Design Automation Conference) ,   2022
• Executive Committee (Award Chair), ACM Special Interest Group on Design Automation (SIGDA) ,   2018-2021
• Program Chair/General Chair/Past Chair, IEEE/ACM International Conference on Computer Aided Design ,   2018/2019/2020
• TPC Chair, ACM/IEEE Asia and South Pacific Design Automation Conference ,   2017
• Tutorial Chair and Executive Committee Member, ACM/IEEE Design Automation Conference ,   2014
• Organizing Committee Chair, TexasWISE Workshop ,   2014
• Co-Chair, IEEE/ACM Workshop on Variability Modeling and Characterization (VMC) ,   2013, 2014
• Conference Co-Chair, CAD/Graphics 2013 ,  
• Faculty Co-Chair, Asian/Asian American Faculty and Staff Association , The University of Texas at Austin,   2012-2014
• Member, Publicity Committee, IEEE Council on EDA ,   2012-
• Chair, ACM/SIGDA Physical Design Technical Committee , 2009-
• Member, Design Technology Working Group, International Technology Roadmap for Semiconductor (ITRS) 2004-
• DAC: DFM Subcommittee Chair, 2016, 2012; PD and Manufacturability Subcommittee Chair, 2011
• ICCAD: DFM Subcommittee Chair, 2012; Biological Systems & Nanoscale and Post-CMOS Systems Subcommittee Chair, 2011
• ASPDAC: DFM Subcommittee Chair, 2012-13; Physical Design Subcommittee Chair, 2011; DFM Subcommittee Chair, 2009
• ISLPED: CAD and Design Tools Subcommittee Co-Chair, 2012, 2013, 2014, 2017
• VLSI-DAT: EDA Subcommittee Chair, 2010-2015
• EDA Subcommittee Chair, ICICDT , 2012, 2013
• Member, Board of Governor, IEEE Council on EDA ,   2010-2011
• Chair, IEEE CAS/CEDA CANDE Technical Committee ,   2009 (Secretary, 2008; Workshop Chair, 2007)
• ACM International Symposium on Physical Design (ISPD) , Steering Committee Chair, 2009; General Chair, 2008; Program Chair, 2007
• CAD track Co-Chair for ISCAS 2006 and 2007
• General/Program Co-Chair, Austin Conference on Integrated Systems and Circuits (ACISC), 2009/2008
• Design of Reliable Circuits and Systems (DFR) Track Co-Chair for ISQED 2007, 2008, 2009
• EDA Track Chair for ASQED 2009
• Program Committee Member: DAC (2009-2012), ICCAD (2003-2005, 2009-2012), ASPDAC (2003-05, 2007, 2009-2013), ICCD (2011-), ISLPED (2011-), SPIE Advanced Lithography/DFM Conference (2012-), SPIE Photonics West/Optoelectronic Interconnects Conference (2012-), ICICDT (2005-). SLIP (2003-2011), DATE (2006-07), ISPD (2004-07), ISQED (2006-2009), ISCAS (2004-07), GLSVLSI (2002-06), etc.

Awards & Honors (Selected)

• 2020 Honor for PhD Student Jiaqi Gu: ACM/SIGDA Student Research Competition Gold Medal
• 2020 Silicon Laboratories Endowed Chair in Electrical Engineering, UT Austin
• 2020 Best Paper Award, ACM International Symposium on Physical Design (ISPD)
• 2019 Honor for PhD Student Meng Li: EDAA Outstanding Dissertation Award
• 2018 Honor for PhD Student Wuxi Li: ACM/SIGDA Student Research Competition Silver Medal
• 2018 Best Paper Award, 28th ACM Great Lakes Symposium on VLSI (GLSVLSI)
• 2018 Honor for PhD Student Meng Li: First Place, ACM Student Research Competition Grand Finals (Graduate Category)
• 2018 Best Paper Award, Integration - the VLSI Journal
• 2018 Honor for PhD Student Xiaoqing Xu: ACM Outstanding PhD Dissertation Award in Electronic Design Automation
• 2017 Honor for PhD Student Meng Li: ACM/SIGDA Student Research Competition Gold Medal
• 2017 Best Paper Award, IEEE International Symposium on Hardware Oriented Security and Trust (HOST)
• 2017 ACM ISPD Contest: First Place
• 2017 SPIE Fellow , for achievements in IC design for manufacturing with advanced lithography
• 2016 Honor for PhD Student Xiaoqing Xu: ACM/SIGDA Student Research Competition Gold Medal
• 2016 ACM International Symposium on Physical Design (ISPD) FPGA Placement Contest: First Place
• 2016 Franco Cerrina Memorial Best Student Paper Award, SPIE Advanced Lithography
• 2015 Best in Session Award, SRC Techcon
• 2015 ASP-DAC Frequently Cited Author Award (as one of the top 3 cited authors in the 20 years of ASP-DAC).
• 2015 ASP-DAC 10-Year Retrospective Most Influential Paper Award Candidate
• 2015 Honor for PhD Student Bei Yu: EDAA Outstanding Dissertation Award
• 2014-2020 Engineering Foundation Endowed Professorship #1, UT Austin
• 2014 RAISE Faculty Excellence Award (Recognizing Asian & Asian American Faculty & Staff Instilling Strength and Excellence), Asian/Asian American Faculty and Staff Association (AAAFSA) and Asian Desi Pacific Islander American Collective (APAC), UT Austin.
• 2014 Best Paper Award, ACM International Symposium on Physical Design (ISPD)
• 2014 IEEE Fellow , for contributions to design for manufacturability in integrated circuits
• 2014 Communications of the ACM, Research Highlights
• 2013 ICCAD CAD Contest, the 2nd Place
• 2013 William J. McCalla Best Paper Award, IEEE/ACM International Conference on Computer Aided Design (ICCAD)
• 2013 SRC Technical Excellence Award for "Nanometer IC Design for Manufacturability", with the citation "In recognition of your key contributions to technology that have significantly enhanced the productivity of the semiconductor industry"
• 2013-2014 Earl N. & Margaret Brasfield Endowed Faculty Fellowship in Engineering, UT Austin
• 2013 DAC Top 10 Author in Fifth Decade
• 2013 DAC Prolific Author Award (DAC 25 Club: has published 25 or more papers at DAC)
• 2013 Honor for PhD Student Duo Ding: ACM Outstanding PhD Dissertation Award in EDA
• 2012 ICCAD'12 CAD Contest, the 2nd Place
• 2012 Best in Session Award, SRC Techcon
• 2012 Best Paper Award, 17th IEEE/ACM Asian and South Pacific Design Automation Conference (ASPDAC)
• 2011 Overseas and Hong Kong/Macau Scholars Collaborative Research Award (a.k.a. Overseas Distinguished Young Scholar) by National Natural Science Foundation of China (NSFC)
• 2011 IBM Research 2010 Pat Goldberg Memorial Best Paper Award in Computer Science, Electrical Engineering and Math
• 2011 Best Paper Award, ACM International Symposium on Physical Design (ISPD)
• 2010 IBM Faculty Award
• 2010 Best Paper Award, IEEE/ACM Asian and South Pacific Design Automation Conference (ASPDAC)
• 2009 UCLA School of Engineering and Applied Science, Distinguished Young Alumnus Award
• 2009 Best Paper (IP) Award, IEEE/ACM Design Automation & Test in Europe (DATE) (Awarded at DATE 2010)
• 2009 Best Student Paper Award, IEEE International Conference on IC Design and Technology (ICICDT)
• 2009 Grand Prize ($25,000), eASIC Placement Design Challenges (Worl dw ide Contest)
• 2008-2009 IEEE CAS Society Distinguished Lecturer
• 2008 Association for Computing Machinery (ACM) Recognition of Service Award
• 2008 Semiconductor Research Corporation (SRC) Inventor Recognition Award
• 2007 Best Paper in Session Award, SRC Techcon Conference
• 2007 National Science Foundation (NSF), Faculty Early Career Development (CAREER) Award
• 2007 Association for Computing Machinery (ACM) Recognition of Service Award
• 2006 IBM Faculty Award
• 2005 ACM/SIGDA Outstanding New Faculty Award
• 2005 IBM Faculty Award
• 2004 IBM Faculty Award
• 2001 Outstanding Ph.D. Award, UCLA Computer Science Department
• 2000 SRC Inventor Recognition Award
• 2000 Dimitris Chorafas Foundation Award
• 1999-2000 IBM Research Fellowship
• 1998 Best Paper in Session Award, SRC Techcon Conference
• 20+ other Best Paper Award Candidates/Finalists: DAC'21, CICC'21, ICCAD'20, DAC'20, ASP-DAC'20, ICCAD'19, DAC 2019, ISPD 2019, DATE 2019, DAC 2014, ASPDAC 2013, DAC 2012, ISPD 2012, ICCAD 2011, DAC 2011, ISPD 2010, ICCAD 2008, ASPDAC 2008, DAC 2006, ASPDAC 2006
• UT Austin Integrated Circuits & Systems Group

Silicon Chip Design & Semiconductor Engineering

Building the chips of tomorrow

certificate Description

Formerly "vlsi and semiconductor engineering", this newly branded certificate program reinforces our dedication to offering top-notch education in the ever-evolving realm of microchip design and semiconductor technology., learn next-level vlsi design skills for top silicon valley companies.

UCSC Silicon Valley Extension Silicon Chip Design & Semiconductor Engineering professional certificate program provides students with the core design skills they need to work at top companies in the Valley. Both established and aspiring engineers develop new skills, gain insight into digital and analog design techniques and methodologies, and learn from our expert faculty.

Integrated circuit curriculum

You'll explore ASIC, semiconductor, EDA, device, and integrated circuits. In our VLSI lab, our instructors will give you the opportunity to get hands-on experience with hardware specification, logic design, verification, synthesis, physical implementation, circuit design, integrated circuit product testing, and the latest EDA tools on Linux.

Who are our students?

Logic designers, design for test professionals, verification engineers, and project leaders receive next-level training for career growth so they can meet the latest demands of top Silicon Valley employers.

Two tailored elective tracks

• Track 1: Front-end Design For professionals pursuing careers in application-specific integrated circuits (ASIC) architectural definitions and logic designs for its implementation.
• Track 2: Back-end Design For professionals interested in the physical implementations of ASIC designs from synthesis to silicon.

Silicon Chip Design & Semiconductor Engineering certificate program objectives

• Implement Verilog modeling of digital logic
• Write assertions for formal verification using SystemVerilog
• Build an advanced UVM verification environment
• Understand and implement DFT concepts in an ASIC design
• Complete practical designs with Xilinx FPGAs
• Implement a design from RTL to GDS

Access to premier tools

Using premier industry tools from Cadence, OpenROAD, Siemens, and Synopsys, you’ll learn front-end and back-end ASIC design and leave the classroom ready to apply new skills at your job.

Silicon Chip Design: A Growing Opportunity

Despite restricted hiring in many tech areas these days, the demand for skilled silicon chip design engineers is blossoming. Learn about the job outlook for VLSI chip designers, in particular, jobs involving microelectronic devices, such as microprocessors and memory chips, and skills to build a competitive resume. (JANUARY • 2023)

Program Overview

Estimated cost: $4,350–$5,500 + est. course materials: $500 (you pay only for courses you enroll in.) | international tuition cost, program requirements: 5 courses (minimum 14 quarter units). take 3 required courses (9 quarter units) and 2 elective courses (minimum 6 quarter units). end with certificate of completion review., minimum hours of instruction: minimum 150 hours of instruction., estimated duration: a full-time student can complete the certificate in 9–12 months., special programs: this program is approved for workforce and international students..

1. Core Course(s): (Choose Three)

Advanced Verification with SystemVerilog OOP Testbench

Benjamin Ting

FPGA Application in Autonomous Driving Systems, Introduction

Practical dft concepts for asics, soc and sip, system and functional verification using uvm (universal verification methodology).

Keshav Kannan

SystemVerilog Assertions and Formal Verification

Mandar M Munishwar

2. Electives: Front-End

Analog IC Design, Introduction

Mehrdad Peyvan

Digital Logic Design Using Verilog

Embedded system hardware architectures, introduction, high-performance computer architecture.

Samit Mehrotra

High Speed Interface Techniques

Io concepts and protocols: pci express and ethernet, wireless infrastructure: from antenna design to 5g, fundamentals.

Edison Fong

3. Electives: Back-End

3D IC Packaging and Physical Verification

Lavanya Aryasomayajula

ASIC Physical Design, Advanced

Comprehensive signal and power integrity for high-speed digital systems.

Kalyan Rapolu

Introduction to VLSI and ASIC Design

Physical design flow from netlist to gdsii.

Jignesh Shah

Practical Design and Implementation of VLSI Memory Devices

Practical design with xilinx fpgas.

Joanna Mapel

Timing Closure in Silicon IC Design

4. Completion Review:

Silicon Chip Design & Semiconductor Engineering Certificate Completion Fee

Vlsi engineering certificate completion fee.

5. Related Workshops - not for credit

Semiconductor Design and Innovation Workshop Series: Timing Constraint Management for Modern System On Chip

Meet our instructors.

Ajit A Natarajan

Arvind Vidyarthi

Ashkan Hashemi

Bharat Patel

Gary Wallichs

Ibrahim Delibalta

Michael A. Wang

Rajesh Y Pendurkar

Sam D Huynh

Shree Laguduva

Yuchung M Wang

Certificate Inquiry Form

Speak to a student services representative.

Call (408) 861-3860

Envelope [email protected]

Recommended Course Sequence

Beginners should take introductory courses before advanced. Other courses can be taken based on your interests and professional levels.

Related Electives

• Embedded System Hardware Architectures, Introduction (3.0)
• System Design for Low Power Management (1.0)

Substitutions

You may take one elective outside the certificate curriculum if you receive prior approval from the Academic Services Department.

Shared credits

Some Engineering and Technology courses may be listed in more than one program. However, only one course may be shared between two E&T certificate programs unless otherwise noted.

To receive your certificate

Upon completion of the course sequence, you may request your Semiconductor Engineering Certificate Completion Review .

Requisite Knowledge

Technical expertise.

You need a degree in a technical field or equivalent knowledge acquired through training and experience in hardware design and development. Experience with UNIX and/or LINUX is required for lab sessions. Knowledge of a programming language such as C, Perl or Bash Shell is helpful.

Please review course descriptions

Make sure you have taken necessary prerequisites or meet the requirements through job experience or previous education before registering for a course.

Advisory Board

Certificate Program Chair

ARVIND VIDYARTHI , M.S.E.E. , ARVIND VIDYARTHI, M.S.E.E., senior director of silicon design implementation and methodology at Altera (an Intel company), has 20+ years of industry experience in chip implementation in various major semiconductor companies such as Sun Microsystems, AMD, and Nvidia. Learn more .

Certificate Program Advisory Committee

JEFFERY GOODING , MSEE Account Technology Executive, Cadence Design Systems

SAM HUYNH , Ph.D., MSEE Principal Member of Technical Staff, AMD Instructor, Silicon Chip Design & Semiconductor Engineering Certificate Program, UCSC Silicon Valley Extension

JIM SCHULTZ , B.S. Product Marketing Manager, Digital Design Implementation, Synopsys Inc.

MANDAR MUNISHWAR , B.E. Formal Verification Engineer, Google Instructor, Silicon Chip Design & Semiconductor Engineering Certificate Program, UCSC Silicon Valley Extension

JOSE RENAU , Ph.D. Professor, Computer Science and Engineering, Jack Baskin School of Engineering, UC Santa Cruz Consultant, Esperanto Technologies, Inc.

BENJAMIN TING , M.S.E.E. Principal Engineer, Micron Technology Instructor, Silicon Chip Design & Semiconductor Engineering Certificate Program, UCSC Silicon Valley Extension

Establish Candidacy

Grade Requirements

Please note that only letter grades of C or higher may be applied to a certificate, and in some programs, students may have more stringent requirements. Students in most employer- and government-sponsored payment programs, such as workforce development, as well as international students on F-1 visas, need to maintain a B average to meet their requirements. Personal Financial Planning students have additional grade requirements for individual courses to attain a certificate.

See Grading and Credits Policy for further information.

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Microelectronics and VLSI Design

• Digital VLSI Design
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